The present invention relates generally to semiconductor fabrication and, more particularly, to a method and apparatus for reducing consumption of compressed dry air (CDA) during chemical mechanical planarization (CMP) operations.
CMP systems are designed to planarize a wafer surface by applying the wafer against a polishing surface in the presence of an abrasive slurry. In some CMP systems, the polishing surface is a belt. For example, the TERES™ CMP system, which is commercially available from Lam Research Corporation, the assignee of this application, is one such belt-type CMP system. FIG. 1 is a simplified schematic diagram of a conventional belt-type CMP system. In this system, polishing surface 100 is in the form of a belt that is driven by rotors 102. Wafer carrier 104 supporting a wafer is disposed over polishing surface 100 and forces the wafer against the polishing surface during the CMP process. Air-bearing platen 106 provides friction-free support to the underside of polishing surface 100 through a layer of compressed dry air (CDA) supplied from a CDA source connected to platen 106.
During CMP operations, the air-bearing platen 106 consumes a significant amount of CDA. The amount of CDA is a function of the size of the wafers being processed. Consequently, as chip fabricators shift from 200 millimeter (mm) wafers to 300 mm wafers the annual cost of CDA significantly increases. Because of the high consumption rate of CDA by air-bearing platens, chip fabricators must also incur capital expenditures to add CDA capacity when purchasing additional CMP systems with air-bearing platens.
Another shortcoming of the belt-type CMP system of FIG. 1 is the transient losses of the CDA at the edge of platen 106. Due to inherent transient losses, the support provided for polishing surface 100 degrades at the edges of the platen. Consequently, the removal rate at the edge of the wafer is the most challenging region on the wafer to control during CMP operations. If the removal rate at the edge of the wafer differs from that for the remainder of the wafer, then the wafer is not planarized evenly. Hence, yields and device quality may be negatively impacted.
In view of the foregoing, there is a need for a method and apparatus for reducing the consumption of CDA during CMP operations and limiting transient losses around the edge of the wafer to provide more uniform support for the entire surface of the wafer.